The present invention relates generally to data communications, and, more particularly, to a Universal Serial Bus (USB) transceiver for a USB controller circuit.
Universal Serial Bus (USB) is a standard for serial interfaces that defines communications between devices such as personal computers (referred to as a USB host) and input/output (I/O) devices such as keyboards, printers, storage, and imaging devices. Various versions of the USB standard have been introduced by the USB-Implementers Forum (USB-IF) including USB 1.0 and USB 2.0. The USB 1.0 standard defines low speed (LS) and full speed (FS) data transfer modes that support data transfer rates of 1.5 megabit per second (Mbps) and 12 Mbps, respectively. The USB 2.0 standard defines a high speed (HS) data transfer mode that supports a data transfer rate of 480 Mbps and is backward compatible, i.e., supports the LS and FS data transfer modes as well. A USB host includes a USB interface that connects the USB host to the devices and is referred to as a host or USB controller. The USB controller includes a USB transceiver that facilitates data communication between the USB controller and the connected devices.
FIG. 1 is a schematic block diagram of a USB 2.0 transceiver 100. The USB transceiver 100 includes a bandgap voltage reference circuit 102, a HS current driver 104, a HS differential data receiver (HSRx) 106, and a disconnect envelope detector 108. The disconnect envelope detector 108 includes first and second comparators 110 and 112, and a voltage reference generation circuit 114. The USB transceiver 100 couples to a USB device (not shown) by way of a pair of differential signaling data lines (referred to as DP and DM lines) 116a and 116b for transfer of data signals (referred to as DP and DM signals). The DP and DM lines 116a and 116b are connected to ground by way of pull-down resistors 118a and 118b. 
The bandgap voltage reference circuit 102 generates a transmitter reference-voltage signal that conforms to the USB 2.0 transmitter eye specification and that is in the range of 300 millivolts (mV) to 525 mV. The HS current driver 104 has HS current source enable (HCSE), HS drive enable (HDE), HS data driver input (HDDI) terminals. The HCSE and HDE terminals are control terminals that enable the HS current driver 104 and an internal current source, respectively. The HDDI terminal is connected to the bandgap voltage reference circuit 102 for receiving the transmitter reference-voltage signal. The HS current driver 104 has first and second output terminals connected to the DP and DM lines 116a and 116b, respectively. A current from the internal current source is directed to the DP and DM lines 116a and 116b by way of the first and second output terminals, respectively. The HSRx 106 has non-inverting and inverting terminals connected to the DP and DM lines 116a and 116b, respectively, for receiving the DP and DM signals from the connected USB device and an output terminal that outputs an HSRx output voltage signal. The first comparator 110 of the disconnect envelope detector 108 has non-inverting and inverting terminals connected to the DP and DM lines 116a and 116b for receiving the DP and DM signals and an output terminal for outputting a HS differential output voltage signal. The second comparator 112 has a non-inverting terminal connected to the output terminal of the first comparator 110 for receiving the HS differential output voltage signal, an inverting terminal connected to the voltage reference generation circuit 114 for receiving a disconnect reference-voltage signal, and an output terminal for outputting a HS disconnect output voltage signal. The disconnect envelope detector 108 detects disconnect between the USB controller and the USB device.
In operation, when the USB controller is connected to the USB device, a special data packet referred to as a Start Of Frame (SOF) packet is transmitted by the HS current driver 104 at a time interval of 125 microseconds during transmission of the DP and DM signals. An End Of Packet (EOP) of a HS SOF packet has a length of 40 bits and includes 5 Non-Return-To-Zero (NRZI) bytes. The 5 NRZI bytes correspond to a logic high state of at least one of the DP and DM lines 116a and 116b that transmits the SOF packet for the length of 40 bits. When the DP and DM lines 116a and 116b are at logic high and low states, respectively, this is referred to as a differential logic high state, and when the DP and DM lines 116a and 116b are at logic low and high states, respectively, this state is referred to as a differential logic low state. When the DP and DM lines 116a and 116b both are low, the data lines are in a single-ended-zero (SE0) state. In the USB 2.0 standard, the differential logic high and low states of the DP and DM lines 116a and 116b are referred to as J and K states, respectively. The disconnect detection between the USB controller and the USB device occurs during the transmission of the EOP of the SOF.
The current that flows in the DP and DM lines 116a and 116b has a value of 17.78 milliamperes (mA). When the HCSE terminal receives a logic high signal, the 17.78 mA current is directed to at least one of the DP and DM lines 116a and 116b. The resistors 118a and 118b have a resistance value of 45 ohms. Resistors of the resistance value 45 ohms are also connected to the DP and DM lines 116a and 116b at the USB device side. When the USB controller is connected to the USB device, an effective load resistance on each side is 22.5 ohms (45 ohms∥45 ohms).
When the USB controller is connected to the USB device and the DP and DM lines 116a and 116b, are at the J state, i.e., when the 17.78 mA current flows in the DP line, the HS differential output voltage signal at a voltage level of 400 mV (17.78 mA*22.5 ohms) is obtained at the output terminal of the first comparator 110. When the USB controller is connected to the USB device and the DP and DM lines 116a and 116b are at the K state, i.e., when the current of 17.78 mA flows in the DM line, the HS differential output voltage signal at a voltage level of −400 mV (17.78 mA*22.5 ohms) is obtained at the output terminal of the first comparator 110. However, when there is a disconnect between the USB controller and the USB device, the 17.78 mA current flows by way of at least one of the resistors 118a and 118b due to the absence of the resistors on the USB device side, resulting in the HS differential output voltage signal of a voltage level of 800 mV (17.78 mA*45 ohms), which is twice the HS differential output voltage signal voltage level when the USB controller and the USB device are connected.
The USB 2.0 standard specifies a disconnect eye specification that ranges from 525 mV to 625 mV. The voltage reference circuit 114 generates the disconnect reference-voltage signal and the second comparator 112 compares the HS differential output voltage signal with the disconnect reference-voltage signal and generates the HS disconnect output voltage signal. The HS disconnect output voltage signal is at logic high state if the voltage level of the HS differential output voltage signal exceeds a voltage level of the disconnect reference-voltage signal. Thus, when the HS differential output voltage signal is at 800 mV i.e., beyond the transmitter and disconnect eye specifications, the HS disconnect output voltage signal is generated at logic high state. The HS disconnect output voltage signal is not generated if the HS differential output voltage signal is less than 525 mV. However, when the HS differential output voltage signal exceeds 625 mV, the HS disconnect output voltage signal goes high.
The HS disconnect envelope detector 108 further includes a voltage-to-current converter circuit (not shown) that converts the HS differential output voltage and disconnect reference-voltage signals to current equivalent signals. The current equivalent of the HS differential output voltage signal is compared with the current equivalent of the disconnect reference-voltage signal. Additional circuitry such as the voltage-to-current converter for the disconnect detection results in an area overhead of the USB controller. Also, the disconnect envelope detector 108 is a differential comparator and requires multiple reference-voltage signals to perform such a comparison. Thus, there are more variations in the comparison result of the disconnect envelope detector 108, resulting in a large spread of the disconnect reference-voltage signal.
There is less noise margin available between the disconnect eye specification and the transmitter eye specification of the USB 2.0 standard. A small amount of noise in the USB controller can falsely trigger the disconnect envelope detector 108 to generate the HS disconnect output voltage signal. As a result, the USB controller receives a false disconnect indication.
Therefore, it would be advantageous to have a USB transceiver that includes a disconnect envelope detector that causes reduced variation in a disconnect reference-voltage signal, and maintains a constant gap between the disconnect reference-voltage signal and the transmitter reference-voltage signal.